Generally the rumor mill spits out nothing however scorching air, and generally it stumbles upon a knowledge entry that, on the very least, doesn’t instantly appear like a figment of somebody’s creativeness. AMD’s newest discovery relating to its alleged Medusa Level APU falls squarely into this second class. AMD has not but formally confirmed something about this cellular chip, however the Geekbench entry—now publicly out there—gives sufficient concrete proof to take the matter critically. What makes this notably fascinating is that the mixture of 10 cores, 20 threads, and 32 MB of L3 cache deviates considerably from what AMD at present gives on this class. Probably the most credible clue up to now comes from a Geekbench 6.6.0 run uploaded on March 16, 2026. It lists an “AMD Eng Pattern: 100-000001713-31_N” on a system named “AMD Plum-MDS1.” It lists 10 cores, 20 threads, 10 MB of L2 cache, 32 MB of L3 cache, a base clock of two.40 GHz, and a most frequency of round 2.01 GHz achieved through the run. It additionally scored 1,210 factors within the single-core check and seven,323 factors within the multi-core check. This knowledge alone doesn’t represent a completed product, however it’s enough to differentiate the pattern from mere database noise.
The L3 cache is especially notable from a technical standpoint. AMD’s formally listed Ryzen AI 9 365 options 10 MB of L2 cache and 24 MB of L3 cache with the identical variety of cores and threads. The presumed Medusa Level pattern thus has an L3 cache that’s 8 MB—or roughly one-third—bigger, whereas sustaining the identical L2 configuration. It’s exactly this level that makes the leak extra related than many different early findings, as a result of right here we aren’t simply coping with a codename, however a concrete structural change is changing into obvious. If this configuration is confirmed, it might be a transparent indication that AMD is just not solely tweaking clock speeds and effectivity within the cellular Zen 6 section, but additionally the cache configuration.
The precise core configuration, nonetheless, stays unclear. The Geekbench entry itself solely lists 10 cores and 20 threads, however not their varieties. Primarily based on leaks up to now, Medusa Level is generally categorised as a hybrid cellular APU combining traditional Zen 6 cores with denser Zen 6c cores. Tom’s {Hardware} additionally factors to earlier transport log and NBD traces which are mentioned to recommend an inside configuration of “4C4D.” Nonetheless, this isn’t a specification confirmed by AMD, however slightly an interpretation of the preliminary knowledge identified up to now. At this level, the core depend and cache may be thought-about confirmed, however not the precise distribution of core varieties. The benchmark scores themselves additionally name for warning. Some leak stories have already tried to deduce spectacular superiority over present Ryzen AI fashions from the multi-core outcomes. Primarily based on the present state of data, that is untimely. The information clearly exhibits that the pattern operates at solely round 2.01 GHz through the run, which is way from the everyday last clock speeds of present cellular processors. An early engineering pattern underneath such circumstances can present insights into structure, cache construction, or platform standing, however is of very restricted use for dependable efficiency assessments. Anybody who already desires to infer the ultimate efficiency class of a manufacturing APU from that is studying wishful considering slightly than knowledge.
The platform designation “Plum-MDS1” can also be intriguing. Within the ongoing leak chronology, “Plum” is linked to a future FP10 surroundings for upcoming AMD cellular SoCs. This aligns with older stories of Medusa Level entries in transport databases that includes completely different efficiency courses, that are principally interpreted as 28-watt and 45-watt variants. This, too, has not but been formally confirmed, however within the context of a successor era for Ryzen AI fashions, it paints a coherent image: a brand new platform, presumably a brand new core structure, extra cache, and preliminary traces in public check databases.
To know how this suits into the present portfolio, it’s vital to differentiate between what AMD has formally said and what it hasn’t. The one factor formally confirmed right now is that Zen 6 is on AMD’s roadmap as an structure; nonetheless, there isn’t any official product launch for Medusa Level, no technical knowledge sheets, and no last cellular lineup. That is exactly why the case stays journalistically fascinating: not as a result of a completed product has already been unveiled right here, however as a result of a number of separate clues now paint a extra constant image. The pattern in Geekbench is essentially the most tangible public affirmation up to now that there’s extra to the codename than simply an early leaked slide.
Conclusion
Following this leak, Medusa Level is just not but a product, however it’s not merely a phantom both. The publicly seen knowledge set with 10 cores, 20 threads, and 32 MB of L3 cache is concrete sufficient to take a brand new cellular Zen 6 era critically as an actual growth line. On the identical time, every thing past core combine, TDP courses, the FP10 platform, and precise efficiency stays, for now, within the realm of believable however unconfirmed hypothesis. That’s precisely the place it will get fascinating: not due to untimely hype, however as a result of AMD’s subsequent cellular APU seems right here for the primary time in a type that may be technically categorized. And in the long run, that’s price way over any leak-fueled hypothesis, regardless of how loudly it’s touted.
